An Investigation of HZO-Based n/p-FeFET Operation Mechanism and Improved Device Performance by the Electron Detrapping Mode

Abstract

Ferroelectric field-effect transistor (FeFET) is a promising nonvolatile memory device because of its CMOS compatibility, scalability, and energy efficiency. However, the device physics has not been studied well, which hinders FeFET development and process design kit (PDK) construction. In this article, we report a comprehensive understanding of the n/p-FeFET operation mechanism as a nonvolatile memory device, for the first time, based on quasi-static split CV measurement. We also suggest a new methodology to examine the device and show the existence of excess trapped charge and the true nonvolatile polarization. Furthermore, we found that charge trapping is necessary to switch polarization in FeFET. Finally, based on our physical findings and insights, we propose a new erase mode that leads to a wider memory window and higher write endurance (> 10(10) cycles), even without optimizing the device fabrication process.