Double-gated ultra-thin-body GaAs-on-insulator p-FETs on Si

Authors
Shim, Jae-PhilKim, Seong KwangKim, HansungJu, GunwuLim, HeejeongKim, SangHyeonKim, Hyung-jun
Issue Date
2018-01
Publisher
AMER INST PHYSICS
Citation
APL MATERIALS, v.6, no.1
Abstract
We demonstrated ultra-thin-body (UTB) junctionless (JL) p-type field-effect transistors (pFETs) on Si using GaAs channels. Wafer bonding and epitaxial lift-off techniques were employed to fabricate the UTB p-GaAs-on-insulator on a Si template. Subsequently, we evaluated the JL FETs having different p-GaAs channel thicknesses considering both maximum depletion width and doping concentration for high performance. Furthermore, by introducing a double-gate operation, we more effectively controlled threshold voltage and attained an even higher I-ON/I-OFF of > 10(6), as well as a low subthreshold swing value of 300 mV/dec. (c) 2018 Author(s).
Keywords
TRANSISTORS; TRANSPORT; MOSFETS; WAFER; TRANSISTORS; TRANSPORT; MOSFETS; WAFER; GaAs; double-gate; Wafer bonding; Epitaxial lift-off; junctionless; ultra-thin-body; p-FET
ISSN
2166-532X
URI
https://pubs.kist.re.kr/handle/201004/121858
DOI
10.1063/1.5000532
Appears in Collections:
KIST Article > 2018
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