Reconfigurable Si Nanowire Nonvolatile Transistors
- Authors
- Park, So Jeong; Jeon, Dae-Young; Piontek, Sabrina; Grube, Matthias; Ocker, Johannes; Sessi, Violetta; Heinzig, Andre; Trommer, Jens; Kim, Gyu-Tae; Mikolajick, Thomas; Weber, Walter M.
- Issue Date
- 2018-01
- Publisher
- WILEY
- Citation
- ADVANCED ELECTRONIC MATERIALS, v.4, no.1
- Abstract
- Reconfigurable transistors merge unipolar p- and n-type characteristics of field-effect transistors into a single programmable device. Combinational circuits have shown benefits in area and power consumption by fine-grain reconfiguration of complete logic blocks at runtime. To complement this volatile programming technology, a proof of concept for individually addressable reconfigurable nonvolatile transistors is presented. A charge-trapping stack is incorporated, and four distinct and stable states in a single device are demonstrated.
- Keywords
- SILICON NANOWIRE; SONOS MEMORY; BARRIER; SILICON NANOWIRE; SONOS MEMORY; BARRIER; intrinsic silicon nanowires; nonvolatile transistors; reconfigurable field effect transistors; reconfigurable memory; Schottky barrier
- ISSN
- 2199-160X
- URI
- https://pubs.kist.re.kr/handle/201004/121867
- DOI
- 10.1002/aelm.201700399
- Appears in Collections:
- KIST Article > 2018
- Files in This Item:
There are no files associated with this item.
- Export
- RIS (EndNote)
- XLS (Excel)
- XML
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.