Boltzmann Switching MoS2 Metal-Semiconductor Field-Effect Transistors Enabled by Monolithic-Oxide-Gapped Metal Gates at the Schottky-Mott Limit
- Authors
- Kim, Yeon Ho; Jiang, Wei; Lee, Donghun; Moon, Donghoon; Choi, Hyun-Young; Shin, June-Chul; Jeong, Yeonsu; Kim, Jong Chan; Lee, Jaeho; Huh, Woong; Han, Chang Yong; So, Jae-Pil; Kim, Tae Soo; Kim, Seong Been; Koo, Hyun Cheol; Wang, Gunuk; Kang, Kibum; Park, Hong-Gyu; Jeong, Hu Young; Im, Seongil; Lee, Gwan-Hyoung; Low, Tony; Lee, Chul-Ho
- Issue Date
- 2024-07
- Publisher
- WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim
- Citation
- Advanced Materials, v.36, no.29
- Abstract
- A gate stack that facilitates a high-quality interface and tight electrostatic control is crucial for realizing high-performance and low-power field-effect transistors (FETs). However, when constructing conventional metal-oxide-semiconductor structures with two-dimensional (2D) transition metal dichalcogenide channels, achieving these requirements becomes challenging due to inherent difficulties in obtaining high-quality gate dielectrics through native oxidation or film deposition. Here, a gate-dielectric-less device architecture of van der Waals Schottky gated metal-semiconductor FETs (vdW-SG MESFETs) using a molybdenum disulfide (MoS2) channel and surface-oxidized metal gates such as nickel and copper is reported. Benefiting from the strong SG coupling, these MESFETs operate at remarkably low gate voltages, <0.5 V. Notably, they also exhibit Boltzmann-limited switching behavior featured by a subthreshold swing of approximate to 60 mV dec(-1) and negligible hysteresis. These ideal FET characteristics are attributed to the formation of a Fermi-level (E-F) pinning-free gate stack at the Schottky-Mott limit. Furthermore, authors experimentally and theoretically confirm that E-F depinning can be achieved by suppressing both metal-induced and disorder-induced gap states at the interface between the monolithic-oxide-gapped metal gate and the MoS2 channel. This work paves a new route for designing high-performance and energy-efficient 2D electronics.
- Keywords
- 2D semiconductors; Fermi-level pinning; low-power electronics; metal-semiconductor field-effect transistors; MoS2
- ISSN
- 0935-9648
- URI
- https://pubs.kist.re.kr/handle/201004/149854
- DOI
- 10.1002/adma.202314274
- Appears in Collections:
- KIST Article > 2024
- Files in This Item:
There are no files associated with this item.
- Export
- RIS (EndNote)
- XLS (Excel)
- XML
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.