Design Points of InGaAs MFMIS Tunnel FET for Large Memory Window and Stable Ferroelectric Memory Operation

Authors
Ko, KyulAhn, Dae-HwanJeong, Jai-YounJu, Byeong-KwonHan, Jae-Hoon
Issue Date
2024-08
Publisher
Institute of Electrical and Electronics Engineers
Citation
IEEE Transactions on Electron Devices
Abstract
We study device structures and their design points of HfZrO X -based InGaAs metal-ferroelectric-metal-insulator-semiconductor (MFMIS) ferroelectric tunnel FETs (Fe-TFETs) based on ferroelectric (FE) polarization-controlled band-to-band tunneling (BTBT) for stable nonvolatile memory (NVM) operation. We monolithically integrated a HfZrO X MFM capacitor into the baseline tunnel field-effect transistor (TFET), which has steep subthreshold swing (SS) characteristics of sub-60 mV/decade with a HfO2 /Al2O3 gate-stack, compared to the reference MOSFET. We found temperature-stable NVM behaviors of the InGaAs Fe-TFET compared to the InGaAs ferroelectric MOSFETs (Fe-MOSFETs) at the measurement temperature range from - 20 C-degrees to 85 C-degrees. Furthermore, we explored the scaling effects of the MFMIS structure using a high- kappa HfO2 gate insulator layer to pursue a steep SS, and a large capacitance ratio between the dielectric (DE) and FE capacitors. The InGaAs MFMIS-structure Fe-TFET achieves stable retention over 10(4) s and excellent endurance during 10 6 cycles at the DE/FE capacitance ratio of 27.5.
Keywords
TRANSISTORS; FUTURE; Iron; Indium gallium arsenide; TFETs; Capacitors; MOSFET; Logic gates; Hafnium oxide; Ferroelectric (FE) FET; Hf0.5Zr0.5O2(HZO); InGaAs; metal-ferroelectric-metal-insulator-semiconductor (MFMIS); tunnel FET
ISSN
0018-9383
URI
https://pubs.kist.re.kr/handle/201004/150602
DOI
10.1109/TED.2024.3449255
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KIST Article > 2024
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