Fully subthreshold current-based characterization of interface traps and surface potential in III-V-on-insulator MOSFETs

Authors
Kim, Seong KwangLee, JungminGeum, Dae-MyeongPark, Min-SuChoi, Won JunChoi, Sung-JinKim, Dae HwanKim, SanghyeonKim, Dong Myong
Issue Date
2016-08
Publisher
PERGAMON-ELSEVIER SCIENCE LTD
Citation
SOLID-STATE ELECTRONICS, v.122, pp.8 - 12
Abstract
We report characterization of the interface trap distribution (D-it(E)) over the bandgap in III-V metal-oxide- semiconductor field-effect transistors (MOSFETs) on insulator. Based only on the experimental subthreshold current data and differential coupling factor, we simultaneously obtained D-it(E) and a nonlinear mapping of the gate bias (V-GS) to the trap level (E-t) via the effective surface potential (psi(S),(eff)). The proposed technique allows direct extraction of the interface traps at the In0.53Ga0.47As-on insulator (-OI) MOSFETs only from the experimental subthreshold current data. Applying the technique to the In0.53Ga0.47As channel III-V-OI MOSFETs with the gate width/length W/L = 100/50, 100/25, and 100/10 mu m/mu m, we obtained D-it(E) congruent to 10(11)-10(12) eV(-1) cm(-2) over the bandgap without the dimension dependence. (C) 2016 Elsevier Ltd. All rights reserved.
Keywords
OXIDE INTERFACE; STATES; OXIDE INTERFACE; STATES; Interface trap; InGaAs-OI MOSFETs; III-V; Subthreshold current model
ISSN
0038-1101
URI
https://pubs.kist.re.kr/handle/201004/123840
DOI
10.1016/j.sse.2016.04.011
Appears in Collections:
KIST Article > 2016
Files in This Item:
There are no files associated with this item.
Export
RIS (EndNote)
XLS (Excel)
XML

qrcode

Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.

BROWSE