Modified Potential Well Formed by Si/SiO2/TiN/TiO2/SiO2/TaN for Flash Memory Application

Abstract

This paper proposes a modified engineered-potential-well (MW) for NAND flash memory application. The MW was formed by using a transitional SiO2/SiOxNy-TiOxNy tunnel barrier, a trap-rich TiO2 trapping layer, and an abrupt SiO2 block barrier. The transitional tunnel barrier shrinks to enhance the tunneling of carriers during programming/erasing (P/E) and extends to suppress charge loss during data retention. Deep-level transient spectroscopy suggests that this tunnel barrier has few shallow traps after a N-2 + O-2 thermal treatment, and the TiO2 trapping layer has deep electron traps. With the variable tunnel barrier and deep electron traps, the MW device showed promising performance in fast programming (< mu s) at low-voltage operation (7-10 MV/cm), good P/E endurance (> 10(6) P/E cycles), large threshold voltage window (Delta V-th =similar to 6 V), as well as improved data retention at 125 degrees C.